Performance Analysis of FD-SOI MOSFET with Different Gate Spacer Dielectric
نویسندگان
چکیده
As scaling down MOSFET devices degrade device performance in term of leakage current and short channel effects. To overcome the problem a newer device Silicon-on-Insulator (SOI) MOSFET has been introduced. The Fully Depleted (FD) SOI MOSFETs also suffer from short channel effects (SCE) in the sub 65 nm regime due to reduction in threshold voltage. Several investigations are going to reduce the SCE in FD-SOI MOSFET. This work is also facilitating for the improvement of performance of FD-SOI MOSFET using high-k gate spacer dielectric. The results from sentaurus TCAD simulator show that high-k spacer dielectric increases on state driving current and reduces off leakage current due to eminent vertical fringing electric field effect. This fringing field also lessens the SCE such as Drain Induced Barrier Lowering (DIBL), Subthreshold Swing (SS). High-k spacer dielectrics ameliorate the Ion/Ioff, transconductance and voltage gain of the FD-SOI MOSFET compare to the conventional oxide spacer. General Terms Drive current, Short channel effects (SCE).
منابع مشابه
Performance evaluation of FD-SOI Mosfets for different metal gate work function
FULLY DEPLETED (FD) SILICON ON INSULATOR (SOI) METAL OXIDE FIELD EFFECT TRANSISTOR (MOSFET) IS THE LEADING CONTENDER FOR SUB 65NM REGIME. THIS PAPER PRESENTS A STUDY OF EFFECTS OF WORK FUNCTIONS OF METAL GATE ON THE PERFORMANCE OF FD-SOI MOSFET. SENTAURUS TCAD SIMULATION TOOL IS USED TO INVESTIGATE THE EFFECT OF WORK FUNCTION OF GATES ON THE PERFORMANCE FD-SOI MOSFET. SPECIFIC CHANNEL LENGTH OF...
متن کاملAnalytical Modeling and Simulation of Short-channel Effects in a Fully Depleted Dual-material Gate (dmg) Soi Mosfet
Silicon-on-insulator (SOI) has been the forerunner of the CMOS technology in the last decade offering superior CMOS devices with higher speed, higher density, excellent radiation hardness and reduced second order effects for submicron VLSI applications. Recent experimental studies have invigorated interest in fully depleted (FD) SOI devices because of their potentially superior scalability rela...
متن کاملMulti-gate Mosfet Structures with High-k Dielectric Materials
Multi-gate MOSFETs has shown better results in subthreshold performances. The replacement of SiO2 by high-k dielectric can fulfill the requirements of Multi-gate MOSFETS with scaling trend in device dimensions. The advancement in fabrication technology has also boosted the use of different high K dielectric materials as oxide layer at different places in MOSFET structures. One of the most impor...
متن کاملA Novel Hybrid Nano Scale MOSFET Structure for Low Leak Application
In this paper, novel hybrid MOSFET(HMOS) structure has been proposed to reduce the gate leakage current drastically. This novel hybrid MOSFET (HMOS) uses source/drain-to-gate non-overlap region in combination with high-K layer/interfacial oxide as gate stack. The extended S/D in the non-overlap region is induced by fringing gate electric field through the high-k dielectric spacer. The gate leak...
متن کاملImprovement of a Nano-scale Silicon on Insulator Field Effect Transistor Performance using Electrode, Doping and Buried Oxide Engineering
In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...
متن کامل